Arquitecturas Paralelas

• Integrar y utilizar los conocimientos previamente adquiridos en la carrera.
• Mejorar la capacidad Investigativa.
• Conceptualizar las técnicas de diseño y elaboración de sistemas de cómputo paralelo.
• Generar una actitud crítica hacia sistemas de cómputo paralelo.
• Diseñar y configurar un sistema que se ajuste a los requisitos establecidos.

• Alto desempeño
• Computación Paralela

• Shared Memory
  • Culler and Pal Singh, Chapter 5
  • Bus-based Architectures (C&S 5.1, 5.3, 5.4)
    • Snooping Protocols: I-V, MSI, MESI, Dragon
  • Non-bus-based Architectures (C&S 8.1 – 8.3)
    • Switched Networks (crossbar, omega, benes)
    • Directory-based Cache Coherence
  • Synchronization (C&S 5.5) (optional)
    • Mutual Exclusion
    • Point-to-point Event Synchronization
    • Global (barrier) Event Synchronization
    • Algorithms for Scalable Synchronization on Shared-Memory Multiprocessors
• Message Passing
  • Communication Modes
    • Synchronous, Buffered, Ready
    • Blocking/Non-blocking
  • MPI Library
    • Send and Receive
    • Wait and Test
    • Broadcast and Reduce
    • Others
    • MPI Documentation

• Topologies for MIMD (C&S 10.4)
  • Linear Arrays and Rings
  • Multidimensional Meshes and Tori
  • Hypercubes
• Switching (C&S 10.2)
  • Store-and-forward
  • Cut-through
  • Wormhole
  • Virtual Cut-through
• Routing (C&S 10.6) (optional)
  • Deadlock Freedom
  • Virtual Channels
  • Up-Down Routing
  • Turn-Model Routing
  • Adaptive Routing
  • Multicast Routing

• Pasos de mensajes
• Memoria compartida
• Híbrido
• Tiempo de Ejecución vs. Tiempo de Comunicación
• Speedup

• SoPC Overview
• EDK Overview
• MicroBlaze Architecture
• EDK Tutorial
• EDK Hands-On Practice
  • Adding a MicroBlaze to an FPGA Design
  • Adding IP to a MicroBlaze Design
  • Writing Basic Software Applications

• Taller 1 Presentación ejercicio1.tgz

• Aplicación (Sugerencias):

MAQUINA VECTORIAL A NIVÉL DE FÍSICA (Pendiente)

  (Utilización de Procesador de Máquina Inversa , dinámica de cuerpo rígido).  

• JARAMILLO Andrés. Parallel Computing: A Brief Introduction. CALTECH, 2004
• CULLER David E., SINGH J. Pal, GUPTA Anoop. Parallel Computer Architecture: A Hardware/Software Approach (The Morgan Kaufmann Series in Computer Architecture and Design), Morgan Kaufmann, 1998
• HENNESSY John L., PATTERSON David A. Computer Architecture: A Quantitative Approach, Third Edition (The Morgan Kaufmann Series in Computer Architecture and Design), Morgan Kaufmann, 2002
• PATTERSON David A., HENNESSY John L. Computer Organization and Design: The Hardware/Software Interface, Third Edition (The Morgan Kaufmann Series in Computer Architecture and Design), Morgan Kaufmann, 2004
• DUATO Jose, YALAMANCHILI Sudhakar, NI Lionel M. Interconnection Networks (The Morgan Kaufmann Series in Computer Architecture and Design), Morgan Kaufmann, 2002
• DALLY William J., TOWLES Brian P. Principles and Practices of Interconnection Networks (The Morgan Kaufmann Series in Computer Architecture and Design), Morgan Kaufmann, 2003
• DOWD Kevin, SEVERANCE Charles. High Performance Computing, 2nd edition, O'Reilly Books, 1998
• KONIGES Alice E. (ed.) Industrial Strength Parallel Computing, Morgan Kaufmann, 2000
• BUYYA Rajkumar (ed.) High Performance Cluster Computing Vol. 1 & 2, Prentice-Hall PTR, 1999
• STERLING Thomas. Beowulf cluster computing with Linux. - 2ed, The MIT Press, 2003
• WADLEIGH Kevin R., CRAWFORD Isom L. Software Optimization for High Performance Computing, Prentice Hall PTR, 2000
• NICHOLS Bradford, BUTTLAR Dick, PROULX FARREL Jacqueline. Pthreads Programming, O'Reilly Books, 1998
• PACHECO Peter. Parallel Programming With MPI, Morgan Kaufman, 1996.
• GROPP William, LUSK Ewing, SKJELLUM Anthony. Using MPI (2nd Edition), MIT Press, 1999
• CHANDRA Rohit et al. Parallel Programming in OpenMP, Morgan Kaufman, 2001
• QUINN Michael J. Parallel Programming in C with MPI and OpenMP, 1st Edition, Oregon State University, 2004
• IEEE Transactions on Computers
• IEEE Design and Test of Computers
• IEEE Micro (special issues on High-Performance Interconnects)